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Daily Parallelism Measurement

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Daily measurement of parallelism will transform your board quality

Parallelism is the most widely recognized wave soldering parameter and among its most misunderstood. You can quickly enjoy less defects and improved repeatability by easily assuring that your boards are parallel to your solder waves every day, every shift.

A shorter version of this article appeared in SMT magazine.

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Parallelism as a High Impact New Frontier in Wave Solder Optimization

Did you ever want to kick your wave machine?  Do you wonder why you still have inconsistencies and rework despite doing “all the right things.”

You’ve established thermal profiles.  You’ve tried no-clean.  You have a maintenance schedule.  You tried a new solder.  You bought an air knife.  Steps such as these can be important to effective wave soldering, but there is more.

So what’s wrong?  Why is wave soldering considered a weak link in your assembly line?  Why is it so frustrating for technicians to control the wave?  Why does management lower its quality, throughput and profit expectations by accepting the high cost of rework of PCBs?

Rework and Inspection are Futile

Rework, touch-up and repair are due to production failures.  Rework is expensive.  First is the large direct cost of the rework operation.   Second, the prevailing defect rate now considered “acceptable” causes a throughput bottleneck at the rework stations.  Third, rework of defects results in joints with shorter lives than those successfully made in the wave solder environment.  Fourth, defects lead to field failures that can only damage the reputation of the product and eventually confidence in the assembly plant.

Inspection is equally futile.  The inspector is at best sampling the quality of the joints on each board and, from the external appearance of the joints, assessing the chances that a satisfactory result has been achieved on all of them.  The idea that an assessment can be made of every joint is obviously ridiculous.  The responsibility for quality PCBs lies with the process, not the inspector.

85% of the PCBs assembled today run through a wave machine as either mixed technology or pure through hole.  Clearly, “improve your wave soldering and you improve your entire assembly line.”  The study results presented in this article show that this is easily achieved.  You don=t have to live with your wave solder defect rate.  Commanding progress can be made right now.

The Missing Link:  Board-Wave Interaction

Until recently, conventional wave solder process control virtually ignored board-wave interaction.  By this we mean actual measurement of the physical interaction of your board with the wave.  This interaction has four distinct, simultaneous facets, all of which can be directly and accurately quantified:  Parallelism, Dwell Time, Immersion Depth and Contact Length.

A major conclusion of the data you will see here:  Your wave solder quality is vastly improved when board-wave interaction is optimized and controlled.  Temperature and chemistry control are not enough.  Board-wave interaction occurs independently, having its own separate set of parameters which are generally unaffected by temperature adjustments and chemistry choices.

In the reflow process, chemistry supports your board in its thermal experience in the oven.  Not true for the wave solder machine.  In wave soldering, chemistry and temperatures are supporting actors in delivering your boards to the central event of the wave machine:  Your board=s interaction with your solder wave.  This has been the missing link in wave soldering until recent years, when technology became commercially available to accurately measure this event.  Such technology permits a new understanding of wave solder optimization.

Given all these factors and the complexity of today=s boards, it=s common sense to directly measure, optimize and control the interaction of your boards with your solder wave.  Why?  Because seemingly small adjustments – for example a 12 mil change in immersion depth for a board with bottom-side surface mount components – can have dramatic quality consequences for today=s boards.  Human visual observation (and reflex, if you=re using stopwatches) are not reliable for detection of what are, for your boards, highly significant variations.

Use accurate measurement of board-wave interaction as the basis for adjustments to your wave machine to ensure the highest quality product.  Relying on your wave machine settings alone leaves you in the dark, since your boards themselves do not have a conveyor speed, pump speed or solder pot height.  Those are wave machine settings and, while necessary, do not in and of themselves tell you what experience you are delivering to your boards.

What you will read here has never been published before, yet its principles have already been implemented on thousands of wave machines throughout the world.  For this initial article we have chosen from among our studies to focus on parallelism as an illustration of these principles. Our purpose:

  1. Define parallelism in a new way so that it is meaningful for wave solder optimization.
  2. Present data and case studies drawn from numerous PCB assembly facilities.

Parallelism Defined

Parallelism is the most widely recognized parameter, which occurs when a board meets the solder wave – and the most misunderstood.  Our industry wide convention is to define parallelism as “rail-to-wave parallelism” or “conveyor-to-wave orientation”.  Both terms mislead the wave technician and engineer disastrously.

The correct term and practical intention should be board-to-wave parallelism.  This is because the alignment of your rail to your solder wave is only one of many factors affecting your real goal, which is that your board be parallel to your wave.

Whether or not your board will be parallel as it passes through your solder wave is determined by numerous critical factors, among them: Loose, bent or broken fingers (often so slightly bent as to be difficult to spot with the human eye but severe enough to cause pervasive bridging or skipping), dross clogging part of your nozzle, unlevel solder pot, unparallel rails and improper placement of the board on the fingers. And then there’s the hidden criminal:  a crooked solder ramp causing your wave to collapse more quickly on one side.  So, measuring parallelism by putting a carpenter=s leveler on your rail is both helpful and at the same time completely inadequate.

Likewise for using glass to check “full coverage”  by solder of the width of your board.  Such visual assessment leads to defects, as it relies on the human judgment of a moving object passing over a wave for only a few seconds.  Figure 1 shows how a PCB can be dramatically disparallel and still make full contact with the solder across its width.  Defects are inevitable because one side of your PCB experiences a much shallower immersion depth as a result of the disparallelism.  This often causes persistent skipping on that side of your board and bridging on the other.

0.2 Second Threshold 

An important element of our approach was the performance of a baseline study, which identified 0.2 seconds as a threshold measurement for parallelism.  This preceded our larger study involving 384 assembly plants, and was achieved by collection of the data shown in the accompanying graph.  Three separate board types were run through the same wave machine with no changes to the fluxer, preheat, conveyor speed, solder pot height and pump speed settings.

For both our baseline study and subsequent larger study, a commercially available device was used which accurately simulates the user=s own circuit boards.  Unique contact sensors, which directly measure the physical experience of the leads in the wave, were employed.  Do not confuse this with previous attempts to extrapolate from temperatures obtained from a thermal profiler or visual observation with a glass plate.

The actual parallelism measurement of this device is the difference between the dwell time in the solder wave of leads on the left and right side of the device.  If your board is parallel to your wave, then the dwell time of the leads on its left side will be equal to those on its right hand side.

After each set of runs, rails were adjusted to cause changes in parallelism readings in 0.1-second increments, from 0.0 seconds to 0.7 seconds.  Defect rates for each board were recorded on each run, with their collective range shown on the accompanying graph.

The baseline study data tells us a few things, some familiar, some not.

First, that a significant jump in disparallelism-caused defects occurs when your parallelism reading is over 0.2 seconds.

Second, that defect rates increase as the extent of disparallelism increases.  As we shall see, the 0.2-second benchmark arrived at from our baseline study proved extremely reliable in the larger study.  Certainly there are boards which demand a tighter parallelism window, say 0.1 seconds or less, just as there are boards which well tolerate disparallelism at even 0.4 seconds.  It is your own board which holds the answer for itself:  At what parallelism reading does your own board quality start to decline?

The third lesson is takes the form of an admonition:  Even if your board is parallel to your solder wave, you=re still left with other, equally critical challenges of board-wave interaction. Your dwell time can be too brief or too lengthy, immersion depth too deep or shallow and contact length too long or short.  Different board types have varying causes of defects along with different quality issues, parallelism being only one among them.  On the other hand, trying to ameliorate disparallelism-related defects by adjusting temperatures is completely futile, as one has no relationship to the other.  So the larger subject of board-wave interaction must always be a top priority.

Yet another observation:  If your board is not parallel, you cannot attribute to it a dwell time or an immersion depth.  Put differently, if one side of your board is deeper in the wave than the other, your board is experiencing a different immersion depth every micro-inch across its width.  Therefore, parallelism is the prerequisite for control of the other three critical facets of board-wave interaction, namely dwell time, immersion depth and contact length.

Parallelism Study Methodology

Following the baseline study, we proceeded to collect parallelism data from 384 PCB assembly facilities over a nineteen-month period.  With such a large sampling, this study cuts across virtually the entire North American PCBA community – OEMs and contract manufacturers with high and low volume and high and low mix alike, performing pure through hole and mixed technology, with single and multiple wave machines and locations, with and without ISO 9000 certification.  Data was obtained from users of virtually all wave machine configurations and chemistry types.

Significantly, all of these plants were already exercising some form of process control on their wave machines, including thermal profilers, profilers on carrier boards, temperature stickers, glass plates, stopwatches and wave height measurers.  The device used in this study, the Wave Solder Optimizer, its technology and patented design had not been previously used by any of the study participants.

The measurement of four separate runs through the wave machine without any adjustment of the wave machine or its settings was required for inclusion in our study.  Multiple measurements were performed easily since data was displayed on the device=s liquid crystal display without delay upon exit from the wave machine.  Equally critical was that runs could be made immediately in sequence with no affect on the parallelism readings, since the direct contact sensors have no relationship to and are unaffected by temperatures.  Without such features, a study of this scope would simply not have been possible.

Our study involved four steps on the part the manufacturing or process engineer:

  1. Before taking any measurements, identify the defect rate/quality of the boards that are being run.
  2. Without making any changes to the wave machine, perform four measurement runs.  The runs performed by each assembly facility easily determined whether or not their wave machine was delivering their boards parallel to the solder wave.  The criteria was simple and came from the baseline study results:  When all four runs showed a parallelism reading of 0.2 seconds or less, successful parallelism was recorded.  When all four runs showed a parallelism reading of 0.3 seconds or greater, disparallelism was recorded.
  3. Engineers whose data showed a disparallelism attempted to correct the problem and then performed an additional set of parallelism measurements.  This showed if the maintenance and/or troubleshooting done on the wave machine actually fixed the disparallelism.
  4. After parallelism had been successfully achieved, production of the PCBs through the wave machine was resumed.  Their PCB defect rate/quality was then compared to the defect rate/quality observed prior to ever taking a parallelism measurement (step 1).

The ability of the engineers to respond quickly to data was aided by important features of the device used:  Electronic identification of whether a disparallelism is to the left or the right, along with a visual depiction of the disparallelism.  As a result, practically all facilities completed the above four steps in less than 1 hour.

Study Results

The results in all respects are astonishing and demonstrate that vast improvement in wave solder performance is readily available to the majority of PCB assembly plants:

  1. Of the 384 PCB assembly facilities, 291 (76%) found their board to be disparallel in their solder wave the very first time a set of measurement runs was taken.
  2. Of the 291 facilities which found their board to be disparallel in their solder wave, 186 (64%) were able to successfully correct their disparallelism in the first round of maintenance/troubleshooting, while 105 (37%) did not successfully address their disparallelism in the first round of maintenance/troubleshooting.
  3. Engineers at virtually all of these 105 facilities stated that without the data from the second set of parallelism measurements, they would have restarted production.
  4. Of these 105 facilities, 97 (92%) were able to readily obtain a successful set of parallelism measurements after additional maintenance/troubleshooting.
  5. This means that 283 (97%) of the 291 facilities which were disparallel at their initial set of measurement runs were able to correct the problem to obtain a successful set of parallelism readings at 0.2 seconds or less.
  6. These 283 facilities then resumed production of the same board for which they had identified the defect rate/quality before taking any parallelism measurements.
  7. Of these 283 facilities, 238 (84%) reported what they considered significant improvements in board quality that very same day, thereby validated the preceding baseline study.


Reason for Immediate Improvements

There is a critical distinction between defects caused by board wave interaction versus defects caused by temperatures.  For example, disparallelism can cause bridging on one side of your boards.  No amount of temperature adjustments can remove such a defect.  This is because the defect is caused by bad board-wave interaction, namely disparallelism. You can adjust your temperatures forever and you will never get rid of this defect; your company will always bear its expense and you its consequences.

More than 85% of the companies which ran the board-wave interaction device used in this study had been using a very different technology known as a thermal profiler for years.  Yet, despite excellent thermal profiling and harmonization of temperatures with their flux type, they still were experiencing persistent wave solder quality problems and inconsistencies.  Our studies, including that on parallelism presented here, strongly suggest that most of the remaining wave solder production failures are due to lack of optimization of the four board-wave interaction parameters.

Conversely, adjustment of parallelism cannot remove defects caused by temperatures.  For example, the cracking of components caused by a too high maximum preheat slope will never be solved by adjustment of your parallelism.  So, just as temperature measurement is essential to the control of temperature-related defects, measurement of board-wave interaction is essential to the control of parallelism, dwell time, immersion depth and contact length.

Implementation of this principle only comes with the ability to perform direct board-wave measurements.  That=s why 84% of the plants in this study were so easily able to improve their wave soldering:  Previously, they were not able to make such measurements and therefore could not react accordingly.  When presented with the proper tools, improvements were significant, ubiquitous and immediate.

Case Study:  Cost Savings from Improved Throughput

Here is data on cost savings achieved by a contract manufacturer in Michigan by following the easy, four step procedure above, in tandem with “The Secret Technique of Marking your Fingers.”

  1. On 2 of 13 wave machines, it was established that boards couldn’t be run until the Optimizer had shown a parallelism reading between -0.2 and +0.2, at the beginning of each shift.
  2. Immediately upon implementation of this very simple procedure, the percent of boards requiring rework dropped from 13% to 4%.  In other words, first pass throughput improved from 87% to 96%.
  3. This quick improvement in throughput reduced operating costs by $125,000 in the first month.
  4. The contract manufacturer directly calculated that over one year this will mean $1,500,000 savings due to increased throughput alone.
  5. As one Optimizer is devoted to each of the two wave machines, that means a return of $125,000 per month on an investment of 16K.
  6. Based on a 30-day month, this means that these two Optimizers paid for themselves in less than four days.
  7. Similar results on their other eleven wave machines means an annual savings due to improved throughput of $9,750,000.

This cost savings calculation is based exclusively on increased throughput.  It does not include reduced labor costs, payroll costs, benefits costs, training of rework personnel, floor space for rework, management time, workstations for rework, hand soldering equipment and consumables. It also does not account for the benefits of reduced field failures by the boards.  It is certain that the reduced costs far, far exceed $1,500,000 annually.

These results were achieved only by bringing the parallelism parameter into spec, which was wisely chosen as a first step.  Further remarkable progress can be made quickly by bringing immersion depths under control, identifying optimal dwell times by board type, verifying fluxer performance and controlling temperatures on a daily basis on all wave machines.

Conclusions

Effective measurement of board-to-wave parallelism is vital to wave solder optimization.  Ensuring that PCBs are run only when direct measurements confirm board-to-wave parallelism results in significant improvement in board quality.  Learning to obtain such data requires little or no training and can be performed in minutes.  When data shows disparallelism, corrective action resulting in clear, immediate improvements can be made right away.

PCB assembly facilities which do not perform such measurements have a 76% likelihood that their boards are not parallel to their solder wave.  That’s the bad news.  The good news is that 84% of these facilities can improve their wave soldering immediately simply by ensuring parallelism through direct measurement of board-wave interaction.  When presented with the proper tool, this study shows that board quality improvements are significant, ubiquitous and immediate.

 

“Many of our voids and insufficients were assumed to be design defects.  Your training instructor used our Optimizer’s measurements to make adjustments easily and now we should never see these defects in our production again.  What a relief!”

– Enda Moran, manufacturing Manager, CEL

“Your instructor solved our excessive solder and bridging by adjusting our process based on our Optimizer’s data, and showed us how we can easily do this by ourselves.”

– Gary Wirth, Production Supervisor, Honeywell

“Our main problem was recurring insufficients.  We made many attempts to address the problem, to no avail.  By using the Optimizer to graph our immersion depth, we identified and corrected turbulence in our main wave.  This has benefited our production process.”

– Jose Martinez, Maintenance Engineering Supervisor, Rain Bird

“The proactive nature of your methodology, which allows us to identify board defects and production issues before they happen, is critical for raising yields.”

– Luis Lopez, Operations Manager, Benchmark Electronics

“Your company walked in here and quickly showed my staff how to reduce defects that we’ve had to live with for a long time.”

– Dennis Herrick, Director of Operations, Condor

“Prior to investing in the Optimizer, we relied on a thermal profiler but we could not solve our skipping and insufficients problems.  In fact, those defects were not due to improper temperatures at all but instead to how our boards run through our solder waves.”

– Ricardo Soto, Process Engineering Manager, Tyco

“In all my years in PCB assembly, I have never seen such an enthusiastic response to a training program.  Other vendors never really improved our problems like you have.”

– Luis Velazquez, Engineering Manager, Plexus

“The Optimizer identified the root cause of chronic skipping on our boards.  We eliminated the disparallelism it measured.  This had an immediate, positive effect on board quality.”

– Aldrina Paredes, Training manager, Bose Electronics

“I have worked with wave solder machines for years and can honestly say that this was the most informative and thorough class that I have attended on this subject.

– Dale Shedd, Process Engineer, Adtran

“Using the Optimizer’s techniques every day on one board type, we saved 257 hours of touch up and rework per month.  This saved our facility over $50,000 in 12 months on this one board type alone.”

– John Lanferman, Process Characterization Group Leader, Celestica

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